2013Advanced TechnologyElectronics
Robert Heath Dennard photo

Robert Heath Dennard

  • U.S.A. / September 5, 1932
  • Electronics Engineer
  • IBM Fellow, Thomas J. Watson Research Center, IBM Corporation

Invention of Dynamic Random Access Memory and Proposal of Guidelines for FET Miniaturization

Dr. Robert Heath Dennard invented the basic structure of Dynamic Random Access Memory (DRAM), which is now extensively utilized as one of integrated circuit (IC) memory systems. His innovation has immensely increased the capacity of digital information storage, leading to dramatic progress in information and telecommunications technology. Dr. Dennard and his colleagues also proposed guidelines, called “scaling theory”, to miniaturize field-effect transistors, which play key roles in most ICs, including DRAM, thereby promoting the amazing advance in IC technology.

Profile

Brief Biography

1932
Born in Texas, U.S.A.
1958
Ph.D. in Electrical Engineering, Carnegie Institute of Technology (now Carnegie Mellon University)
1958
Staff Engineer, IBM Research, IBM Corporation
1963
Research Staff Member, Thomas J. Watson Research Center, IBM Corporation
1973
Group Manager, Thomas J. Watson Research Center, IBM Corporation
1982
Manager of MOS Devices and Circuits, Silicon Technology Department, Thomas J. Watson Research Center, IBM Corporation
1979
IBM Fellow, Silicon Technology Department, Thomas J. Watson Research Center, IBM Corporation

Selected Awards and Honors

1988
National Medal of Technology and Innovation, U.S. Government
1997
Inducted into National Inventors Hall of Fame
2006
C&C Prize, NEC C&C Foundation
2007
Benjamin Franklin Medal in Electrical Engineering, The Franklin Institute
2009
Charles Stark Draper Prize, National Academy of Engineering
2009
IEEE Medal of Honor, IEEE (The Institute of Electrical and Electronics Engineers)
Members
National Academy of Engineering, IEEE, American Philosophical Society

Selected Publications

1968

Field-Effect Transistor Memory, U.S. Patent 3,387,286, June 4, 1968.

1974

Design of Ion-Implanted MOSFETs with Very Small Physical Dimensions (with Gaensslen, F. H. et al.), IEEE Journal of Solid-State Circuits SC9: 256-268, 1974.

1975

Fabrication of a Miniature 8K-Bit Memory Chip Using Electron-Beam Exposure (Yu, H. N., Dennard, R. H. et al.), Journal of Vacuum Science and Technology 12: 1297-1300, 1975.

1984

Evolution of the MOSFET Dynamic RAM – A Personal View, IEEE Transactions on Electron Devices 31: 1549-1555, 1984.

1997

Scaling Challenges for DRAM and Microprocessors in the 21st Century, in Electrochemical Society Proceedings 97-3: 519-532, 1997.

Citation

Invention of Dynamic Random Access Memory and Proposal of Guidelines for FET Miniaturization

Dr. Robert Heath Dennard invented the basic structure of the Dynamic Random Access Memory (DRAM) which is now utilized extensively as one of integrated circuit (IC) memory systems. This innovation has immensely increased the capacity of digital information storage, leading to dramatic progress in information and telecommunications technology. Dr. Dennard and his colleagues also proposed design guidelines for miniaturizing MOS (metal oxide semiconductor) field-effect transistors (FETs), which play key roles in most ICs, including DRAM, thereby promoting the amazing advance in IC technology.

Dr. Dennard began working on memory ICs for computers in the 1960s and invented the basic DRAM structure in 1967. Its fundamental memory unit, or cell, consists of one FET (hereinafter, “transistor”) and one capacitor; each cell stores one bit of data as “1” or “0” by controlling the presence or absence of an electric charge on the capacitor. Cells are arranged on a chip in a matrix form and connected to grid-like wire lines to create a DRAM. The system is called random access memory because it permits any memory cell to be accessed in random order by the selection of a specific horizontal “word” line and a vertical “bit” line, unlike the sequential access memory provided by tape storage.

To store digital information, one bit of data, “1” or “0”, is written in each cell by supplying or removing an electric charge on its capacitor through the transistor. Because the charge thus stored on each capacitor gradually drains away, it is necessary to refresh the capacitor periodically, leading to the name “dynamic” RAM, or DRAM. To read the binary data of a cell, the presence or absence of a stored charge on the capacitor is detected by precisely measuring a change in the electric potential of the bit line.

In 1970, 1k-bit DRAM chip using a three-transistor cell was commercially released, while Dr. Dennard’s one-transistor design made its market debut in 1973. Since then, all the DRAMs have been produced by incorporating the single-transistor structure.

In addition to his DRAM invention, Dr. Dennard and his coworkers studied how FET characteristics changed when they were scaled down, and proposed design guidelines (scaling theory) useful for FET miniaturization. This facilitated the integration of more FETs on a single chip, increasing DRAM storage capacity more than one million-fold, while permitting drastic improvement in the speed and performance of microprocessors and other ICs.

These achievements by Dr. Dennard brought about remarkable developments in integrated circuit technologies, which provided the essential foundation for tremendous progress in information and communications equipments.

For these reasons, the Inamori Foundation is pleased to present the 2013 Kyoto Prize in Advanced Technology to Dr. Robert Heath Dennard.

Lecture

Abstract of the Lecture

”Reflections on Creativity in My Microelectronics Career”

Born in Texas in 1932 during the great depression, I grew up in a family of modest means on a farm without electricity and started my education in a one-room schoolhouse. How I went on from there to a notable career in electrical engineering may seem amazing. This talk describes the key steps along the way which tempered my character and attitudes, and led me to the educational path behind my success.

I think I was very fortunate to have an opportunity to join IBM Research at the time the field of computing was growing rapidly and, moreover, to have a chance to get into microelectronics near its beginning. I will describe what inspired me to invent DRAM and the motivation to keep working on my ideas until I reached the simple structure I envisioned.

My contributions to the scaling principles of microelectronics came early in a new program with an ambitious goal of greatly reducing the cost of computer memory, which required us to make DRAM with much smaller dimensions. I led an investigation, with a few coworkers, of how the transistors used in DRAM and other microelectronics circuits would work with such greatly reduced size. We devised a set of scaling rules which made them function properly and operate faster with much less energy consumption. Test versions of highly-scaled DRAM were built to show it could actually be done. I will review the impact of this work which led to programs with very large scale integrated circuits (VLSI) in Japan and around the world.

Reflecting on why I was successful in my career, and talking with other inventors, I found some traits common to creative people in engineering and science. My conclusion and slogan is “Attitude is Everything”. This talk explains what that means and how I came to develop the attitude that drives my work.

I will conclude by discussing the importance of addressing long-range worldwide future problems such as clean energy supply, preserving our environment, and minimizing or managing global warming for this century and beyond. I hope the computing and communications capability developed by my generation will be helpful, but I realize the complexity and difficulty of this challenge will require everyone in all disciplines to solve.

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Workshop

Workshop

Integrated Circuits: 50 Years of Their Evolution and Future Prospects

date
Tuesday, November 12, 2013
palce
Kyoto International Conference Center
Coordinators
Toshiro Hiramoto (Professor, the University of Tokyo) Kenji Taniguchi (Member, Kyoto Prize Committee in Advanced Technology; President, Nara National College of Technology) Takayasu Sakurai (Professor, the University of Tokyo) Hiroyuki Sakaki (Chairman, Kyoto Prize Committee in Advanced Technology; President, Toyota Technological Institute)
Organized by Inamori Foundation
Supported by Kyoto Prefectural Government, Kyoto City Government, NHK
With the cooperation of IEEE SSCS Japan Chapter, IEEE EDS Japan Chapter, The Japan Society of Applied Physics, The Institute of Electrical Engineers of Japan , IEICE/Electronics Society, JSPS/165th committee on Ultra Integrated Silicon System

Program

10:00
Opening Address and Introduction of Laureate Hiroyuki Sakaki
SessionⅠ Chairperson: Kenji Taniguchi
Laureate’s Lecture Akihiro Nitayama (Deputy General Manager, Center for Semiconductor Research & Development, Toshiba Co.)
“Technology Trends on Advanced Semiconductor Memories”
Intermission
Topic Lectures of advanced memory technologies (DRAM, MRAM, ReRAM) Hideharu Miyake (Principal Professional, DRAM Business Unit, Elpida Memory, a substantial of Micron Technology, Inc.)
“Advanced DRAM Technology“
Tetsuo Endoh (Director, Center for Innovative Integrated Electronic Systems of Tohoku University)
“STT-MRAM technology and its NV-Logic applications for Ultimate Power Management“
Norikatsu Takaura (Group leader, Phase Change Device Research Group, Low-power Electronics Association & Project (LEAP))
“New Resistive Switching Memory“
Lecture Ken Takeuchi (Professor, Chuo University)
“NAND Flash Memory and Storage Class Memory Hybrid Memory Solution for Future Big Data Application”
Intermission
SessionⅡ Chairperson: Toshiro Hiramoto
Lecture Koji Inoue (Associate Professor, Kyushu University)
“Green Computing: A Computer Architecture Perspective”
Lecture Mitsumasa Koyanagi (Professor, Tohoku University)
“3D Integration to Achieve Ultra-Low Power Consumption”
Lecture Shin’ichiro Kimura (Deputy Project Leader, Low-power Electronics Association & Project)
“FD-SOI, Promising Device for Low-power Electronics”
Lecture Shinichi Takagi (Professor, The University of Tokyo)
“High Mobility Channel Transistor Technologies for Low Power CMOS”
Intermission
Panel Discussion “Future Prospects of Integrated Circuits”
Moderator Moderator: Ken Uchida (Professor, Keio University)
Panelists Tetsuya Asai (Associate Professor, Hokkaido University)
Ken Takeuchi
Tetsu Tanaka (Professor, Tohoku University)
Hitoshi Wakabayashi (Professor, Tokyo Institute of Technology)
17:00
Closing
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